D2IRQCTL_ENABLE_BUS_ERROR=Val_0x0, D2IRQCTL_CLR_FINISH_DLIST=Val_0x0, D2IRQCTL_CLR_BUS_ERROR=Val_0x0, D2IRQCTL_CLR_FINISH_ENUM=Val_0x0, D2IRQCTL_ENABLE_FINISH_ENUM=Val_0x0, D2IRQCTL_ENABLE_FINISH_DLIST=Val_0x0
Interrupt Control Register
D2IRQCTL_ENABLE_FINISH_ENUM | 0 (Val_0x0): Disable enumeration finished interrupt 1 (Val_0x1): Enable enumeration finished interrupt |
D2IRQCTL_ENABLE_FINISH_DLIST | 0 (Val_0x0): Disable display list finished interrupt 1 (Val_0x1): Enable display list finished interrupt |
D2IRQCTL_CLR_FINISH_ENUM | 0 (Val_0x0): Leave enumeration interrupt untouched 1 (Val_0x1): Clear enumeration interrupt |
D2IRQCTL_CLR_FINISH_DLIST | 0 (Val_0x0): Leave display list interrupt untouched 1 (Val_0x1): Clear display list interrupt |
D2IRQCTL_ENABLE_BUS_ERROR | 0 (Val_0x0): Disable bus error interrupt 1 (Val_0x1): Enable bus error interrupt |
D2IRQCTL_CLR_BUS_ERROR | 0 (Val_0x0): Leave bus error interrupt untouched 1 (Val_0x1): Clear bus error interrupt |